
SMBus/I 2 C Interfaced 4-Port, Level-Translating
GPIOs and LED Drivers
Pin Description
PIN
MAX7306 MAX7307
NAME
FUNCTION
Reset Input. RST is an active-low input, referenced to V DD , that clears the 2-wire interface,
1
1
RST
which can be configured to put the device in the power-up reset condition and reset the
PWM and blink timing.
2
3
4
5
6
—
7
8
9
10
—
2
3
4
5
6
7
—
8
9
10
—
P1/ INT
GND
P2/OSCIN
P3/OSCOUT
P4
V LA
AD0
V DD
SDA
SCL
EP
Input/Output Port. P1/ INT is configurable as an open-drain I/O or as a transition detection
interrupt output.
Ground
Input/Output Port. P2/OSCIN is configurable as a push-pull I/O, open-drain I/O, or as the
PWM/blink/timing oscillator input.
Input/Output Port. P3/OSCOUT is configurable as a push-pull I/O, open-drain I/O, or as
the PWM/blink/timing oscillator output.
Input/Output Port. P4 is configurable as a push-pull I/O or an open-drain I/O.
Port Supply for P1–P4. Connect V LA to a power supply between 1.40V and 5.5V. Bypass
V LA to GND with a 0.1μF capacitor.
Address Input. Sets the device slave address. Connect to GND, V DD , SCL, or SDA to
provide four address combinations.
Positive Supply Voltage. Bypass V DD to GND with a 0.1μF ceramic capacitor.
Serial-Data I/O
Serial-Clock Input
Exposed Pad (μMAX only). Connect to GND.
6
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